Embodiments relate to a semiconductor device and a method for manufacturing the same. Metal interconnections of a semiconductor device may connect circuits formed in a semiconductor substrate to each other. This may be done through electrical connections and pad connections between semiconductor devices, for example by using a metal thin film, that may include aluminum, aluminum alloys, and/or copper.
To connect a pad with an electrode, which may be insulated from each other by an insulating layer such as, for example, an oxide layer, a contact hole may be formed, for example by selectively etching the insulating layer. A metal plug for filling the contact hole may then be formed, for example by using barrier metal or tungsten.
After forming a metal thin film on the resultant structure, the metal thin film may be patterned to form a metal interconnection to connect the pad with the electrode.
To pattern a metal interconnection, a photolithography process may be used. Because, however, the critical dimension (CD) of the metal interconnection has been reduced as semiconductor devices have been fabricated in smaller sizes, it may become difficult to form a micro-pattern of the metal interconnection through a photolithography process.
For this reason, a damascene process has been proposed that may more easily form metal interconnections having a micro-pattern.
A metal interconnection formed through such a damascene process may have a multi-layer structure. For a multi-layer metal interconnection including copper, a barrier layer (for example including SiN and SiCN) may be formed on the entire surface of a lower copper metal interconnection and a lower inter-metal dielectric (IMD) layer to prevent the diffusion of a lower copper metal interconnection into an upper IMD layer that may surround the upper copper metal interconnection.
This may have various problems. For example, as a barrier layer may be formed on the entire surface of the lower copper metal interconnection and the lower IMD layer, an effective dielectric constant (k) of the lower IMD layer may increase, thereby causing an RC delay. Thus, the reliability of a semiconductor device may be degraded.